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Silicon Labs /Series1 /EFR32FG1P /EFR32FG1P132F128GM32 /PRS /ROUTEPEN

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Interpret as ROUTEPEN

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https://regviz.com/r/Silicon Labs/Series1/EFR32FG1P/EFR32FG1P132F128GM32/PRS/ROUTEPEN#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CH0PEN)CH0PEN 0 (CH1PEN)CH1PEN 0 (CH2PEN)CH2PEN 0 (CH3PEN)CH3PEN 0 (CH4PEN)CH4PEN 0 (CH5PEN)CH5PEN 0 (CH6PEN)CH6PEN 0 (CH7PEN)CH7PEN 0 (CH8PEN)CH8PEN 0 (CH9PEN)CH9PEN 0 (CH10PEN)CH10PEN 0 (CH11PEN)CH11PEN

Description

I/O Routing Pin Enable Register

Fields

CH0PEN

CH0 Pin Enable
CH1PEN

CH1 Pin Enable
CH2PEN

CH2 Pin Enable
CH3PEN

CH3 Pin Enable
CH4PEN

CH4 Pin Enable
CH5PEN

CH5 Pin Enable
CH6PEN

CH6 Pin Enable
CH7PEN

CH7 Pin Enable
CH8PEN

CH8 Pin Enable
CH9PEN

CH9 Pin Enable
CH10PEN

CH10 Pin Enable
CH11PEN

CH11 Pin Enable

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data